Design of a multi valued current mode comparator

In this paper, a low-power quaternary comparator circuit using current-mode CMOS multiple-valued logic (MVL) circuits has been presented. Existing MVL comparator circuits consume high power. The circuit presented in this paper low power. It has been simulated with PSPICE using the transistor mode...

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Main Authors: Farhana, Soheli, Alam, A. H. M. Zahirul, Khan, Sheroz
Format: Article
Language:English
Published: INSI Publications 2011
Subjects:
Online Access:http://irep.iium.edu.my/7353/
http://irep.iium.edu.my/7353/
http://irep.iium.edu.my/7353/1/662-666.pdf
id iium-7353
recordtype eprints
spelling iium-73532012-12-14T00:55:21Z http://irep.iium.edu.my/7353/ Design of a multi valued current mode comparator Farhana, Soheli Alam, A. H. M. Zahirul Khan, Sheroz TK Electrical engineering. Electronics Nuclear engineering In this paper, a low-power quaternary comparator circuit using current-mode CMOS multiple-valued logic (MVL) circuits has been presented. Existing MVL comparator circuits consume high power. The circuit presented in this paper low power. It has been simulated with PSPICE using the transistor model parameter values of the BSIM3 NMOS model V3.2 for 0.13um CMOS process. With a 1.3-volt power supply, simulations show that the proposed quaternary comparator consumes 0.107 mW total average static power and a sampling rate 500MHz. Power and speed for comparators designed in these technologies are discussed. The comparator design is suitable for the needs of mixed signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design. INSI Publications 2011 Article PeerReviewed application/pdf en http://irep.iium.edu.my/7353/1/662-666.pdf Farhana, Soheli and Alam, A. H. M. Zahirul and Khan, Sheroz (2011) Design of a multi valued current mode comparator. Australian Journal of Basic and Applied Sciences, 5 (10). pp. 662-666. ISSN 1991-8178 http://www.insipub.com/ajbas/2011/October-2011/662-666.pdf
repository_type Digital Repository
institution_category Local University
institution International Islamic University Malaysia
building IIUM Repository
collection Online Access
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Farhana, Soheli
Alam, A. H. M. Zahirul
Khan, Sheroz
Design of a multi valued current mode comparator
description In this paper, a low-power quaternary comparator circuit using current-mode CMOS multiple-valued logic (MVL) circuits has been presented. Existing MVL comparator circuits consume high power. The circuit presented in this paper low power. It has been simulated with PSPICE using the transistor model parameter values of the BSIM3 NMOS model V3.2 for 0.13um CMOS process. With a 1.3-volt power supply, simulations show that the proposed quaternary comparator consumes 0.107 mW total average static power and a sampling rate 500MHz. Power and speed for comparators designed in these technologies are discussed. The comparator design is suitable for the needs of mixed signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design.
format Article
author Farhana, Soheli
Alam, A. H. M. Zahirul
Khan, Sheroz
author_facet Farhana, Soheli
Alam, A. H. M. Zahirul
Khan, Sheroz
author_sort Farhana, Soheli
title Design of a multi valued current mode comparator
title_short Design of a multi valued current mode comparator
title_full Design of a multi valued current mode comparator
title_fullStr Design of a multi valued current mode comparator
title_full_unstemmed Design of a multi valued current mode comparator
title_sort design of a multi valued current mode comparator
publisher INSI Publications
publishDate 2011
url http://irep.iium.edu.my/7353/
http://irep.iium.edu.my/7353/
http://irep.iium.edu.my/7353/1/662-666.pdf
first_indexed 2023-09-18T20:16:42Z
last_indexed 2023-09-18T20:16:42Z
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