Design of a high-speed, reconfigurable digital rank order filter
A new architecture to realize a modular, high speed, reconfigurable, digital Rank Order Filter (ROF) is presented in this paper. A bit-level algorithm by Kar and Pradhan has been modified in this work to implement the proposed ROF. Using the proposed digital rank selection circuit it is possible to...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
IIUM Press
2009
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/4496/ http://irep.iium.edu.my/4496/ http://irep.iium.edu.my/4496/1/Design_of_a_high-speed%2C_reconfigurable_digital_rank_order_filter.pdf |