Fault tolerant hardware for high performance signal processing
The approach described in this paper uses an array of Field Programmable Gate Array (FPGA) devices to implement a fault tolerant hardware system that can be compared to the running of fault tolerant software on a traditional processor. Fault tolerance is achieved is achieved by using FPGA with on t...
| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://irep.iium.edu.my/38157/ http://irep.iium.edu.my/38157/ http://irep.iium.edu.my/38157/1/Fault_Tolerant_Hardware_for_High_Performance_Signal_Processing.pdf |