Modeling of the reliability baseline for process control monitoring kerf structures
We present the Product Chip Monitor-Wafer Level Reliability (PCM-WLR) model and characteristic of a 45nm thick gate-oxide (GOX), trench DMOS technology. The process control monitor (PCM) refers to the suite of test structures usually placed in the scribe line (alternatively named kerf, street or tes...
Main Authors: | , , |
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Format: | Conference or Workshop Item |
Language: | English |
Published: |
2011
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Subjects: | |
Online Access: | http://irep.iium.edu.my/19885/ http://irep.iium.edu.my/19885/ http://irep.iium.edu.my/19885/1/Modeling_of_the_Reliability_Baseline_for_Process.pdf |