Optimization of Nanowire Resistance Load Logic Inverter
This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of...
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American Scientific Publishers
2015
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ump-79612017-08-22T06:54:49Z http://umpir.ump.edu.my/id/eprint/7961/ Optimization of Nanowire Resistance Load Logic Inverter Naif, Yasir Hashim Othman, Sidek QC Physics This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of load resistor tends to increasing in noise margins until saturation point, increasing load resistor after this point will not improve noise margins significantly. American Scientific Publishers 2015 Article PeerReviewed application/pdf en http://umpir.ump.edu.my/id/eprint/7961/1/ftech-2015-yasir-optimization_of_nanowire.pdf application/pdf en http://umpir.ump.edu.my/id/eprint/7961/3/Optimization%20of%20Nanowire%20Resistance%20Load%20Logic%20Inverter.pdf Naif, Yasir Hashim and Othman, Sidek (2015) Optimization of Nanowire Resistance Load Logic Inverter. Journal of Nanoscience and Nanotechnology, 15 (9). pp. 6840-6842. ISSN 1533-4880 (Print); 1533-4899 (Online) http://dx.doi.org/10.1166/jnn.2015.10342 DOI: 10.1166/jnn.2015.10342 |
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QC Physics Naif, Yasir Hashim Othman, Sidek Optimization of Nanowire Resistance Load Logic Inverter |
description |
This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of load resistor tends to increasing in noise margins until saturation point, increasing load resistor after this point will not improve noise margins significantly. |
format |
Article |
author |
Naif, Yasir Hashim Othman, Sidek |
author_facet |
Naif, Yasir Hashim Othman, Sidek |
author_sort |
Naif, Yasir Hashim |
title |
Optimization of Nanowire Resistance Load Logic Inverter |
title_short |
Optimization of Nanowire Resistance Load Logic Inverter |
title_full |
Optimization of Nanowire Resistance Load Logic Inverter |
title_fullStr |
Optimization of Nanowire Resistance Load Logic Inverter |
title_full_unstemmed |
Optimization of Nanowire Resistance Load Logic Inverter |
title_sort |
optimization of nanowire resistance load logic inverter |
publisher |
American Scientific Publishers |
publishDate |
2015 |
url |
http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/1/ftech-2015-yasir-optimization_of_nanowire.pdf http://umpir.ump.edu.my/id/eprint/7961/3/Optimization%20of%20Nanowire%20Resistance%20Load%20Logic%20Inverter.pdf |
first_indexed |
2023-09-18T22:05:09Z |
last_indexed |
2023-09-18T22:05:09Z |
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1777414658838233088 |