Optimization of Nanowire Resistance Load Logic Inverter
This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of...
| Main Authors: | , |
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| Format: | Article |
| Language: | English English |
| Published: |
American Scientific Publishers
2015
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| Subjects: | |
| Online Access: | http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/ http://umpir.ump.edu.my/id/eprint/7961/1/ftech-2015-yasir-optimization_of_nanowire.pdf http://umpir.ump.edu.my/id/eprint/7961/3/Optimization%20of%20Nanowire%20Resistance%20Load%20Logic%20Inverter.pdf |
| Summary: | This study is the first to demonstrate characteristics optimization of nanowire resistance load inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on resistance value. Increasing of load resistor tends to increasing in noise margins until saturation point, increasing load resistor after this point will not improve noise margins significantly. |
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