Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor

This paper investigates the optimal nano-dimensions channel for Gallium Arsenide Fin Field Effect Transistor (GaAs-FinFET) based on I ON /I OFF ratio and subthreshold swing (SS). The impact of reducing channel dimensions (length, width, and oxide thickness) on GaAs-FinFET performance has been evalua...

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Main Authors: Mahmood, Ahmed, Jabbar, Waheb A., Saad, Wasan Kadhim, Hashim, Yasir, Hadi, Manap
Format: Conference or Workshop Item
Language:English
Published: IEEE 2018
Subjects:
Online Access:http://umpir.ump.edu.my/id/eprint/25088/
http://umpir.ump.edu.my/id/eprint/25088/
http://umpir.ump.edu.my/id/eprint/25088/1/Optimal%20Nano-Dimensional%20Channel%20of%20GaAs-FinFET%20Transistor.pdf
id ump-25088
recordtype eprints
spelling ump-250882019-06-18T01:58:30Z http://umpir.ump.edu.my/id/eprint/25088/ Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor Mahmood, Ahmed Jabbar, Waheb A. Saad, Wasan Kadhim Hashim, Yasir Hadi, Manap T Technology (General) This paper investigates the optimal nano-dimensions channel for Gallium Arsenide Fin Field Effect Transistor (GaAs-FinFET) based on I ON /I OFF ratio and subthreshold swing (SS). The impact of reducing channel dimensions (length, width, and oxide thickness) on GaAs-FinFET performance has been evaluated in terms of various electrical characteristics (I ON /I OFF , SS, VT and DIBL). The MuGFET simulation tool is used in this study to simulate the current-voltage characteristics for different dimensions of channel. According to highest I ON /I OFF ratio, and nearest SS to the ideal SS, the best channel dimensions of GaAs-FinFET are designed. The results show that the best performance can be achieved with the lowest scaling factor, K of 0.25, when the length is 40 nm, the width is 3 nm, and the oxide thickness is 1 nm. IEEE 2018 Conference or Workshop Item PeerReviewed pdf en http://umpir.ump.edu.my/id/eprint/25088/1/Optimal%20Nano-Dimensional%20Channel%20of%20GaAs-FinFET%20Transistor.pdf Mahmood, Ahmed and Jabbar, Waheb A. and Saad, Wasan Kadhim and Hashim, Yasir and Hadi, Manap (2018) Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor. In: IEEE Student Conference on Research and Development (SCOReD 2019), 26-28 November 2018 , Selangor, Malaysia. pp. 1-5.. ISBN 978-1-5386-9175-5 https://doi.org/10.1109/SCORED.2018.8710811
repository_type Digital Repository
institution_category Local University
institution Universiti Malaysia Pahang
building UMP Institutional Repository
collection Online Access
language English
topic T Technology (General)
spellingShingle T Technology (General)
Mahmood, Ahmed
Jabbar, Waheb A.
Saad, Wasan Kadhim
Hashim, Yasir
Hadi, Manap
Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
description This paper investigates the optimal nano-dimensions channel for Gallium Arsenide Fin Field Effect Transistor (GaAs-FinFET) based on I ON /I OFF ratio and subthreshold swing (SS). The impact of reducing channel dimensions (length, width, and oxide thickness) on GaAs-FinFET performance has been evaluated in terms of various electrical characteristics (I ON /I OFF , SS, VT and DIBL). The MuGFET simulation tool is used in this study to simulate the current-voltage characteristics for different dimensions of channel. According to highest I ON /I OFF ratio, and nearest SS to the ideal SS, the best channel dimensions of GaAs-FinFET are designed. The results show that the best performance can be achieved with the lowest scaling factor, K of 0.25, when the length is 40 nm, the width is 3 nm, and the oxide thickness is 1 nm.
format Conference or Workshop Item
author Mahmood, Ahmed
Jabbar, Waheb A.
Saad, Wasan Kadhim
Hashim, Yasir
Hadi, Manap
author_facet Mahmood, Ahmed
Jabbar, Waheb A.
Saad, Wasan Kadhim
Hashim, Yasir
Hadi, Manap
author_sort Mahmood, Ahmed
title Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
title_short Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
title_full Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
title_fullStr Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
title_full_unstemmed Optimal Nano-Dimensional Channel of GaAs-FinFET Transistor
title_sort optimal nano-dimensional channel of gaas-finfet transistor
publisher IEEE
publishDate 2018
url http://umpir.ump.edu.my/id/eprint/25088/
http://umpir.ump.edu.my/id/eprint/25088/
http://umpir.ump.edu.my/id/eprint/25088/1/Optimal%20Nano-Dimensional%20Channel%20of%20GaAs-FinFET%20Transistor.pdf
first_indexed 2023-09-18T22:38:20Z
last_indexed 2023-09-18T22:38:20Z
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