Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor
This study explores optimization of resistance load (R-Load) of four silicon nanowire transistor (SiNWT)-based static random-access memory (SRAM) cell. Noise margins and inflection voltage of butterfly characteristics with static power consumption of SRAM cell are used as limiting factors in this op...
Main Author: | Hashim, Yasir |
---|---|
Format: | Article |
Language: | English English |
Published: |
American Scientific Publishers
2018
|
Subjects: | |
Online Access: | http://umpir.ump.edu.my/id/eprint/19249/ http://umpir.ump.edu.my/id/eprint/19249/ http://umpir.ump.edu.my/id/eprint/19249/ http://umpir.ump.edu.my/id/eprint/19249/1/17JNN-13956.pdf http://umpir.ump.edu.my/id/eprint/19249/7/ftech-2018-yasir.pdf |
Similar Items
-
A New Approach for Dimensional Optimization of Inverters in 6T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor
by: Hashim, Yasir
Published: (2017) -
Characterization of silicon nanowire transistor
by: Al Ariqi, Hani Taha, et al.
Published: (2019) -
Optimization of Nanowire Resistance Load Logic Inverter
by: Naif, Yasir Hashim, et al.
Published: (2015) -
Temperature sensitivity of silicon nanowire transistor based on channel length
by: AlAriqi, Hani Taha, et al.
Published: (2019) -
Temperature characteristics of silicon nanowire transistor depending on oxide thickness
by: AlAriqi, Hani Taha, et al.
Published: (2019)