A New Simulation Model for Nanowire-CMOS Inverter Circuit
This This paper is to suggest a new model for predicting the static characteristics of nanowire-CMOS (NW-CMOS) inverter. This model depends on experimental (or simulated) output characteristics of load and driver transistors separately as an input data. This model used in this research to investigat...
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| Format: | Conference or Workshop Item |
| Language: | English English |
| Published: |
IEEE
2016
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| Online Access: | http://umpir.ump.edu.my/id/eprint/14448/ http://umpir.ump.edu.my/id/eprint/14448/ http://umpir.ump.edu.my/id/eprint/14448/1/2016-08-38-0021.pdf http://umpir.ump.edu.my/id/eprint/14448/7/ftech-2016-yasir-New%20Simulation%20Model%20for%20Nanowire-CMOS%20Inverter1.pdf |
| Summary: | This This paper is to suggest a new model for predicting the static characteristics of nanowire-CMOS (NW-CMOS) inverter. This model depends on experimental (or simulated) output characteristics of load and driver transistors separately as an input data. This model used in this research to investigate the effect of length (L), oxide thickness (Tox) and numbers of nanowires in P and N-channel SiNWT on the NW-CMOS inverter output and current characteristics. This study used MuGFET simulation tool to produce the output Characteristics of SiNWT which used as input to a designee MATLAB software to calculate the characteristics of NW-CMOS. The output (Vout-Vin) and current (Iout-Vin) characteristics that calculated shows excellent behaviors for digital applications. |
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