Embedded processor security
A preliminary model is introduced in this paper whereby data and its associated security properties are treated as a single atomic unit of information in a hardware-only context. Security-tagged data allows each datum to be properly manipulated with a predictable assurance. This paper addresses the...
Main Authors: | , |
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Format: | Conference or Workshop Item |
Language: | English |
Published: |
2007
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Subjects: | |
Online Access: | http://irep.iium.edu.my/709/ http://irep.iium.edu.my/709/ http://irep.iium.edu.my/709/1/Print-SAM2007.pdf |
Summary: | A preliminary model is introduced in this paper whereby data and its associated security properties are treated as a single atomic unit of information in a hardware-only context. Security-tagged data allows each datum to be properly manipulated with a predictable assurance. This paper addresses the data modeling, process modeling and network modeling of the associated security-tagged data. This work is a part of a larger issue that instruction set architectures (ISAs) do not consider the information assurance implications in its operational environment. |
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