Design and analysis of a boosted pierce oscillator using MEMS SAW resonators

This paper highlights the design and analysis of a pierce oscillator circuit for CMOS MEMS surface acoustic wave resonators. The boosted pierce topology using two, three-stage cascode amplifiers provides sufficient gain to counteract the high insertion losses of - 65 dB at 1.3 GHz of the SAW resonat...

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Main Authors: Md Hamzah, Mohd Haidar, Karim, Jamilah, Md Ralib @ Md Raghib, Aliza 'Aini, Nordin, Anis Nurashikin
Format: Article
Language:English
English
English
English
Published: Springer Berlin Heidelberg 2018
Subjects:
Online Access:http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/1/59902_Design%20and%20analysis%20of%20a%20boosted_SCOPUS.pdf
http://irep.iium.edu.my/59902/2/59902_Design%20and%20analysis%20of%20a%20boosted_MYRA.pdf
http://irep.iium.edu.my/59902/13/59902_Design%20and%20analysis.pdf
http://irep.iium.edu.my/59902/19/59902_Design%20and%20analysis%20of%20a%20boosted%20pierce%20oscillator%20using%20MEMS%20SAW%20resonators_WOS.pdf
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spelling iium-599022019-01-24T02:30:18Z http://irep.iium.edu.my/59902/ Design and analysis of a boosted pierce oscillator using MEMS SAW resonators Md Hamzah, Mohd Haidar Karim, Jamilah Md Ralib @ Md Raghib, Aliza 'Aini Nordin, Anis Nurashikin TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices This paper highlights the design and analysis of a pierce oscillator circuit for CMOS MEMS surface acoustic wave resonators. The boosted pierce topology using two, three-stage cascode amplifiers provides sufficient gain to counteract the high insertion losses of - 65 dB at 1.3 GHz of the SAW resonator. For accurate prediction of the oscillator’s performance before fabrication, circuit design utilized touchstone S2P measurement results of the MEMS SAW resonator, which provides better results compared to the conventional method of using equivalent circuit simulations. This circuit was designed using Silterra’s 0.13 lm CMOS process. It has low power consumption of 1.52 mW with high voltage swing 0.10–0.99 V. All simulations were conducted using Cadence Design Systems and results indicate that phase noise of 92.63 dBc at 1 MHz. Springer Berlin Heidelberg 2018-01-01 Article PeerReviewed application/pdf en http://irep.iium.edu.my/59902/1/59902_Design%20and%20analysis%20of%20a%20boosted_SCOPUS.pdf application/pdf en http://irep.iium.edu.my/59902/2/59902_Design%20and%20analysis%20of%20a%20boosted_MYRA.pdf application/pdf en http://irep.iium.edu.my/59902/13/59902_Design%20and%20analysis.pdf application/pdf en http://irep.iium.edu.my/59902/19/59902_Design%20and%20analysis%20of%20a%20boosted%20pierce%20oscillator%20using%20MEMS%20SAW%20resonators_WOS.pdf Md Hamzah, Mohd Haidar and Karim, Jamilah and Md Ralib @ Md Raghib, Aliza 'Aini and Nordin, Anis Nurashikin (2018) Design and analysis of a boosted pierce oscillator using MEMS SAW resonators. Microsystems Technologies, 24 (1). pp. 587-594. ISSN 0946-7076 E-ISSN 1432-1858 https://link.springer.com/article/10.1007/s00542-017-3627-y 10.1007/s00542-017-3627-y
repository_type Digital Repository
institution_category Local University
institution International Islamic University Malaysia
building IIUM Repository
collection Online Access
language English
English
English
English
topic TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices
spellingShingle TK7800 Electronics. Computer engineering. Computer hardware. Photoelectronic devices
Md Hamzah, Mohd Haidar
Karim, Jamilah
Md Ralib @ Md Raghib, Aliza 'Aini
Nordin, Anis Nurashikin
Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
description This paper highlights the design and analysis of a pierce oscillator circuit for CMOS MEMS surface acoustic wave resonators. The boosted pierce topology using two, three-stage cascode amplifiers provides sufficient gain to counteract the high insertion losses of - 65 dB at 1.3 GHz of the SAW resonator. For accurate prediction of the oscillator’s performance before fabrication, circuit design utilized touchstone S2P measurement results of the MEMS SAW resonator, which provides better results compared to the conventional method of using equivalent circuit simulations. This circuit was designed using Silterra’s 0.13 lm CMOS process. It has low power consumption of 1.52 mW with high voltage swing 0.10–0.99 V. All simulations were conducted using Cadence Design Systems and results indicate that phase noise of 92.63 dBc at 1 MHz.
format Article
author Md Hamzah, Mohd Haidar
Karim, Jamilah
Md Ralib @ Md Raghib, Aliza 'Aini
Nordin, Anis Nurashikin
author_facet Md Hamzah, Mohd Haidar
Karim, Jamilah
Md Ralib @ Md Raghib, Aliza 'Aini
Nordin, Anis Nurashikin
author_sort Md Hamzah, Mohd Haidar
title Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
title_short Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
title_full Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
title_fullStr Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
title_full_unstemmed Design and analysis of a boosted pierce oscillator using MEMS SAW resonators
title_sort design and analysis of a boosted pierce oscillator using mems saw resonators
publisher Springer Berlin Heidelberg
publishDate 2018
url http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/
http://irep.iium.edu.my/59902/1/59902_Design%20and%20analysis%20of%20a%20boosted_SCOPUS.pdf
http://irep.iium.edu.my/59902/2/59902_Design%20and%20analysis%20of%20a%20boosted_MYRA.pdf
http://irep.iium.edu.my/59902/13/59902_Design%20and%20analysis.pdf
http://irep.iium.edu.my/59902/19/59902_Design%20and%20analysis%20of%20a%20boosted%20pierce%20oscillator%20using%20MEMS%20SAW%20resonators_WOS.pdf
first_indexed 2023-09-18T21:24:55Z
last_indexed 2023-09-18T21:24:55Z
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