A very high speed FPGA-based Sudoku solver
This paper proposes FPGA (Field Programmable Gate Array) based high speed Sudoku solver platform. It focuses on the FPGA ability to solve complex problems in a little time. This ability comes from parallel execution of multiple processes at the same time. FPGA with 50 Mega Hertz crystal is used. The...
| Main Authors: | , , |
|---|---|
| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2015
|
| Subjects: | |
| Online Access: | http://irep.iium.edu.my/48053/ http://irep.iium.edu.my/48053/ http://irep.iium.edu.my/48053/1/ID_118.pdf |
| id |
iium-48053 |
|---|---|
| recordtype |
eprints |
| spelling |
iium-480532016-01-22T07:06:03Z http://irep.iium.edu.my/48053/ A very high speed FPGA-based Sudoku solver AlDahoul, Nouar Htike@Muhammad Yusof, Zaw Zaw Zarzar, Mouayad T Technology (General) This paper proposes FPGA (Field Programmable Gate Array) based high speed Sudoku solver platform. It focuses on the FPGA ability to solve complex problems in a little time. This ability comes from parallel execution of multiple processes at the same time. FPGA with 50 Mega Hertz crystal is used. The output of this work is an embedded system that is able to solve hard 9×9 puzzles within 1 µs. Some terminals such as PS2 mouse and VGA monitor were used to provide an interactive interface between the user and the platform. 2015 Conference or Workshop Item PeerReviewed application/pdf en http://irep.iium.edu.my/48053/1/ID_118.pdf AlDahoul, Nouar and Htike@Muhammad Yusof, Zaw Zaw and Zarzar, Mouayad (2015) A very high speed FPGA-based Sudoku solver. In: International Conference on Advances Technology in Telecommunication, Broadcasting, and Satellite, 26-27 September, 2015, Jakarta, Indonesia. (In Press) http://telsatech.org/ |
| repository_type |
Digital Repository |
| institution_category |
Local University |
| institution |
International Islamic University Malaysia |
| building |
IIUM Repository |
| collection |
Online Access |
| language |
English |
| topic |
T Technology (General) |
| spellingShingle |
T Technology (General) AlDahoul, Nouar Htike@Muhammad Yusof, Zaw Zaw Zarzar, Mouayad A very high speed FPGA-based Sudoku solver |
| description |
This paper proposes FPGA (Field Programmable Gate Array) based high speed Sudoku solver platform. It focuses on the FPGA ability to solve complex problems in a little time. This ability comes from parallel execution of multiple processes at the same time. FPGA with 50 Mega Hertz crystal is used. The output of this work is an embedded system that is able to solve hard 9×9 puzzles within 1 µs. Some terminals such as PS2 mouse and VGA monitor were used to provide an interactive interface between the user and the platform. |
| format |
Conference or Workshop Item |
| author |
AlDahoul, Nouar Htike@Muhammad Yusof, Zaw Zaw Zarzar, Mouayad |
| author_facet |
AlDahoul, Nouar Htike@Muhammad Yusof, Zaw Zaw Zarzar, Mouayad |
| author_sort |
AlDahoul, Nouar |
| title |
A very high speed FPGA-based Sudoku solver |
| title_short |
A very high speed FPGA-based Sudoku solver |
| title_full |
A very high speed FPGA-based Sudoku solver |
| title_fullStr |
A very high speed FPGA-based Sudoku solver |
| title_full_unstemmed |
A very high speed FPGA-based Sudoku solver |
| title_sort |
very high speed fpga-based sudoku solver |
| publishDate |
2015 |
| url |
http://irep.iium.edu.my/48053/ http://irep.iium.edu.my/48053/ http://irep.iium.edu.my/48053/1/ID_118.pdf |
| first_indexed |
2023-09-18T21:08:16Z |
| last_indexed |
2023-09-18T21:08:16Z |
| _version_ |
1777411080097628160 |