Zero skew clock routing for fast clock tree generation

A Zero Skew Clock Routing Methodology has been developed to help design team speed up their clock tree generation process. The methodology works by breaking up the clock net into smaller partitions, then inserting clock buffers to drive each portion, and lastly, routing the connection from orig...

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Main Authors: Reaz, Mamun Ibn, Amin, Nowshad, Ibrahimy, Muhammad Ibn, Mohamad-Yasin, F., Mohammad, A.
Format: Conference or Workshop Item
Language:English
Published: 2008
Subjects:
Online Access:http://irep.iium.edu.my/36143/
http://irep.iium.edu.my/36143/
http://irep.iium.edu.my/36143/1/04564488.pdf
id iium-36143
recordtype eprints
spelling iium-361432015-08-17T10:57:02Z http://irep.iium.edu.my/36143/ Zero skew clock routing for fast clock tree generation Reaz, Mamun Ibn Amin, Nowshad Ibrahimy, Muhammad Ibn Mohamad-Yasin, F. Mohammad, A. T Technology (General) A Zero Skew Clock Routing Methodology has been developed to help design team speed up their clock tree generation process. The methodology works by breaking up the clock net into smaller partitions, then inserting clock buffers to drive each portion, and lastly, routing the connection from original clock source to each newly inserted clock buffers with zero skew. A few Perl scripts and a new Visual Basic based routing tool have been developed to support the methodology implementation. The routing algorithm used in this tool is based on the Exact Zero Skew Routing Algorithm. The methodology has been tested using a real design database and resulting in a significant improvement in the through put time required to complete the clock tree generation. This improvement is attributed to the ability to generate clock tree on much smaller portions of clock nets that supports of speeding up the clock tree generation process in IC design. 2008 Conference or Workshop Item PeerReviewed application/pdf en http://irep.iium.edu.my/36143/1/04564488.pdf Reaz, Mamun Ibn and Amin, Nowshad and Ibrahimy, Muhammad Ibn and Mohamad-Yasin, F. and Mohammad, A. (2008) Zero skew clock routing for fast clock tree generation. In: IEEE Canadian Conference on Electrical and Computer Engineering - Circuits, Devices and Systems, 5th-7th May 2008, Niagara Falls, Canada. http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=04564488
repository_type Digital Repository
institution_category Local University
institution International Islamic University Malaysia
building IIUM Repository
collection Online Access
language English
topic T Technology (General)
spellingShingle T Technology (General)
Reaz, Mamun Ibn
Amin, Nowshad
Ibrahimy, Muhammad Ibn
Mohamad-Yasin, F.
Mohammad, A.
Zero skew clock routing for fast clock tree generation
description A Zero Skew Clock Routing Methodology has been developed to help design team speed up their clock tree generation process. The methodology works by breaking up the clock net into smaller partitions, then inserting clock buffers to drive each portion, and lastly, routing the connection from original clock source to each newly inserted clock buffers with zero skew. A few Perl scripts and a new Visual Basic based routing tool have been developed to support the methodology implementation. The routing algorithm used in this tool is based on the Exact Zero Skew Routing Algorithm. The methodology has been tested using a real design database and resulting in a significant improvement in the through put time required to complete the clock tree generation. This improvement is attributed to the ability to generate clock tree on much smaller portions of clock nets that supports of speeding up the clock tree generation process in IC design.
format Conference or Workshop Item
author Reaz, Mamun Ibn
Amin, Nowshad
Ibrahimy, Muhammad Ibn
Mohamad-Yasin, F.
Mohammad, A.
author_facet Reaz, Mamun Ibn
Amin, Nowshad
Ibrahimy, Muhammad Ibn
Mohamad-Yasin, F.
Mohammad, A.
author_sort Reaz, Mamun Ibn
title Zero skew clock routing for fast clock tree generation
title_short Zero skew clock routing for fast clock tree generation
title_full Zero skew clock routing for fast clock tree generation
title_fullStr Zero skew clock routing for fast clock tree generation
title_full_unstemmed Zero skew clock routing for fast clock tree generation
title_sort zero skew clock routing for fast clock tree generation
publishDate 2008
url http://irep.iium.edu.my/36143/
http://irep.iium.edu.my/36143/
http://irep.iium.edu.my/36143/1/04564488.pdf
first_indexed 2023-09-18T20:51:44Z
last_indexed 2023-09-18T20:51:44Z
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